At the end of February 2022 , the IEEE International Solid-State Circuits Conference (ISSCC ) , known as the " International Olympics of Integrated Circuits " , was successfully held .
ISSCC is the highest-level conference in the field of integrated circuit design recognized by the world's academic and business circles .
At this meeting, academician Huang Ru from Peking University School of Integrated Circuits and Institute of Artificial Intelligence - Assistant Professor Yan Bonan's research group published an academic article on in- memory computing " A 1.
041Mb/mm 2 27.
38TOPS/W Signed-INT8 Dynamic Logic Based ADC-Less SRAM Compute-In-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications " is included in the topic "Session 11 In-Memory Computing and SRAM" (article number 11.
This work proposes a high-efficiency ADC -free SRAM in-memory computing acceleration engine, which can achieve a high energy efficiency ratio of 27.
38TOPS/W@INT8 based on the 28nm process and achieve a density of up to 1.
041Mb / mm2 , reaching the international leading indicators and realizing technology breakthrough
Collaborators on this work include Beijing Pingxin Technology Co.
, NeoNexus Group and Duke University
The research group has received funding from the Institute of Artificial Intelligence of Peking University and Beijing Pingxin Technology
The brief introduction of this work and research group is attached as follows:
All-digital in-memory computing technology route
This work realizes a 32Kb ADC -free SRAM in -memory computing acceleration unit at the 28nm technology node, replacing traditional analog-to-digital conversion or CMOS static logic with dynamic logic computing circuits, achieving high energy efficiency and area-efficiency ratios .
At the same time, the reconfigurable local processing units ( Reconfigurable Local Process Units , RLPU ) distributed in the memory array implement bitcell -level array logic operations, and extend to vector-matrix correlation calculations ( VHP/VMM ).
The traditional architecture has an order of magnitude advantage, laying a solid foundation for the actual industrial application deployment of in-memory computing technology .
In-Memory Computing Chip Demonstration
In-memory computing chips are mainly used for the acceleration of massive multiplication and addition calculations in deep learning networks
The research group also used the prototype chip to conduct practical demonstrations of common neural networks, which were widely praised in the demonstration session of ISSCC
Demo video link:
Brief Introduction of Academician Huang Ru-Assistant Professor Yan Bonan's Research Group
Assistant Professor Yan Bonan, received a Ph.
in Electronics and Computer from Duke University in 2020
, and then joined the Institute of Artificial Intelligence of Peking University to engage in research on the intersection of artificial intelligence and chips .
The main research directions include:
· Emerging memory IC design
· Storage and calculation integrated circuits and systems
· Artificial intelligence computer microarchitecture
The research group recruits undergraduates and postgraduates who are interested in exploring the unknown and innovating all year round.
For questions about cooperation and enrollment, please contact Email : bonanyan@pku.
ISSCC Conference Introduction
ISSCC ( IEEE International Solid-State Circuits Conference , International Solid-State Circuits Conference) is the highest-level conference in the field of integrated circuit design recognized by the world academia and business circles, and is considered to be the " Olympic Conference "
in the field of integrated circuit design .
The world's first TTL circuit, the world's first 8 -bit microprocessor, the world's first 1Gb DRAM , the world's first GHz microprocessor, the world's first multi-core processor and many other integrated circuits The landmark inventions in history were disclosed for the first time at the conference
Since 1954 , the conference has been successfully held for 68 sessions
The selection of this in-memory computing paper means that this core technology has reached the international leading level and has been recognized by the academic community, representing a new direction in the chip field .
Today, with the continuous improvement of AI technology applications, in-memory computing Has huge development prospects